1. Field of the Invention
The present invention relates to a semiconductor device. In particular, the present invention relates to a method of fabricating a strained silicon transistor.
2. Description of the Prior Art
With the trend of miniaturization of semiconductor device dimensions, the scale of the gate, source and drain of a transistor decreases in accordance with the decrease in critical dimension (CD). Due to the physical limitation of the materials used, the decrease in scale of the gate, source and drain results in the decrease of carriers that determine the magnitude of the current in the transistor element, and this can therefore adversely affect the performance of the transistor. Increasing carrier mobility in order to boost up a MOS transistor is an important topic in the field of current semiconductor technique.
In various current techniques, mechanical stress is generated on purpose in the channel to increase the carrier mobility. For example, a silicon germanium (SiGe) channel layer is epitaxically formed on the Si substrate to construct a compressive strained channel to substantially increase the hole mobility. Or, a silicon channel is epitaxically formed on the germanium (SiGe) layer to construct a tensile strained channel to substantially increase the electron mobility.
The selective epitaxial growth may be used to embed doped Ge in the source region and in the drain region after the gate is formed to construct a pressed strained silicon structure for increasing the electron mobility in PMOS. Or, the selective Si epitaxial growth may be used to embed doped C in the source region and in the drain region to construct a tensile strained silicon structure for increasing the electron mobility.
Alternatively, a stress may be applied on the contact etch stop layer (CESL) to generate tensile or compressive strain in the channel of each transistor on the semiconductor substrate to improve the carrier mobility.
With the trend of miniaturization of the dimension of MOS transistors, however, the speed demands on MOS transistors are also growing, so the compressive strain or tensile strain caused by the above-mentioned conventional techniques gradually fail to meet the challenging demand.